Chapter 8 Main Memory
Ways to manage memory & Hardware support
Execution cycle -- fetch, decode, fetch operands, execute, store result
Nonetheless, memory only see a stream of addresses
Basic hardware -- base register and limit register
Address binding -- compile time, load time, execution time
Logical address vs. physical address
Address space
MMU
Relocation register, dynamic loading, dynamic linked libraries
Swapping, backing store
Contiguous memory allocation
OS partition and user partition, multiple partitions
Location of interrupt vector, start location upon boot
Internal and external fragmentation
Paging, page frame, page table
Address calculation -- address is page number and page offset
No external fragmentation, internal fragmentation about 1/2 page per process
Small vs. large page sizes
Page-table base register (PTBR)
Translation look-aside buffer (TLB)
Hierarchical paging
Two-level paging
Hashed page tables -- inverted page tables
Segmentation
Segmentation registers